How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.

Abstract: We taped out three large System-on-Chips in three years on 22nm CMOS technology, featuring multiple RISC-V cores, and subsystems for Machine Learning, Ethernet, Serdes, LP-DDR SDRAM, and IO.

Various file system improvements/changes BTRFS ... Add driver for Raspberry Pi CFE (RP1-CFE) hardware block that includes: RISC-V Svade and Svadu (accessed and dirty bit) extension support for host ...

Excalidraw is an innovative online whiteboarding tool that uses the power of artificial intelligence (AI) to convert simple text prompts into detailed, professional-quality diagrams. Whether you ...

Imagination Technologies has decided to exit the RISC-V CPU market to redirect its resources to the development of its GPU and AI products. This was reported by eeNews Europe following an interview ...

The Milk-V Oasis was supposed to be a mini ITX motherboard featuring a Sophgo SG2380 processor featuring 16 SiFive P670 RISC-V processor cores, Imagination AXT-16-512 graphics, and an NPU with up ...

Saarbruecken/Germany, 16 January 2025 – HighTec EDV-Systeme GmbH, a leading provider of automotive C/C++ compiler solutions, adds support for Nuclei System Technology’s RISC-V CPU IP. HighTec's ...

HighTec EDV-Systeme, a provider of automotive C/C++ compiler solutions, has announced that it has added support for Nuclei System Technology’s RISC-V CPU IP. C/C++ Compiler suite supports Nuclei ...

RISC-V CPU core X100 ... integrated into different locations within the SoC bus system to enable distributed peripheral virtualization and accelerator acceleration. Including CPU subsystem, bus ...

HANGZHOU, China, Jan. 9, 2025 /PRNewswire/ -- Recently, SpacemiT, a RISC-V ... bus system to enable distributed peripheral virtualization and accelerator acceleration. Including CPU subsystem ...