ARFM-Driven Row Hammer Defense with Unveiling the Threat of Short tRC Patterns” was published by researchers at KAIST and Sk hynix. Abstract (partial) “To address the issue of powerful row hammer (RH) ...

A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...

The ISRO Inertial Systems Unit (IISU) in Thiruvananthapuram initiated the development of a 64-bit RISC-V-based controller and ...

IIT Madras and ISRO develop the SHAKTI microprocessor, an indigenous chip for space applications, enhancing command, control, ...

IIT Madras develops indigenous Shakti semiconductor chip for ISRO, marking a milestone in Make in India efforts.

The IRIS (Indigenous RISC-V Controller for Space Applications) chip was developed by IIT Madras in collaboration with ISRO’s Inertial Systems Unit (IISU) in Thiruvananthapuram. Manufactured at the ...

New Delhi: Indian Institute of Technology (IIT) Madras and ISRO have developed an indigenous microprocessor for space ...

IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...

Madras and ISRO have developed an indigenous microprocessor for space applications which can be used in command and control systems and other critical functions in outer space. The SHAKTI ...

IIT Madras and ISRO have collaboratively developed the SHAKTI microprocessor for space applications. This indigenous chip, based on RISC-V architecture and backed by the Ministry of Electronics, aims ...

In a major step toward self-reliance in semiconductor technology, the Indian Space Research Organisation (ISRO) and the Indian Institute of Technology Madras (IIT-Madras) have developed an indigenous ...

A joint effort with ISRO Inertial Systems Unit, Thiruvananthapuram, the chip was manufactured at Semiconductor Laboratory ...