How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.
A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...
A joint effort with ISRO Inertial Systems Unit, Thiruvananthapuram, the chip was manufactured at Semiconductor Laboratory Chandigarh packaged at Tata Advanced Systems, Karnataka, showcasing a major st ...
The 'IRIS' (Indigenous RISCV Controller for Space Applications) chip was developed from the 'SHAKTI' processor baseline. It can be used in IoT and compute systems.