How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.

IIT Madras and ISRO have developed IRIS, India's first aerospace-grade semiconductor chip, enhancing space self-reliance.

IIT Madras and ISRO develop the SHAKTI microprocessor, an indigenous chip for space applications, enhancing command, control, ...

A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...

The ISRO Inertial Systems Unit (IISU) in Thiruvananthapuram initiated the development of a 64-bit RISC-V-based controller and ...

NCSC CTO Ollie Whitehouse discussed a UK government-backed project designed to secure underlying computer hardware, ...

IIT Madras develops indigenous Shakti semiconductor chip for ISRO, marking a milestone in Make in India efforts.

RISC C.I.C. – the open silicon ecosystem organisation – based in Cambridge has revealed a significant scale-up in a ...

The IRIS (Indigenous RISC-V Controller for Space Applications) chip was developed by IIT Madras in collaboration with ISRO’s ...

IRIS has been built on the SHAKTI processor baseline. This allows a wide deployment onto diverse domains from Internet of ...

IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...