How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.

The Romanian Academy announced, following the General Assembly, the election of four new corresponding members and two ...

Five years after the earliest rumors of the high-performance electric luxury crossover, the online configurator is finally ...

IIT Madras and ISRO have developed IRIS, India's first aerospace-grade semiconductor chip, enhancing space self-reliance.

IIT Madras and ISRO develop the SHAKTI microprocessor, an indigenous chip for space applications, enhancing command, control, ...

A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...

The ISRO Inertial Systems Unit (IISU) in Thiruvananthapuram initiated the development of a 64-bit RISC-V-based controller and ...

The IRIS (Indigenous RISC-V Controller for Space Applications) chip was developed by IIT Madras in collaboration with ISRO’s ...

IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...

Madras and ISRO have developed an indigenous microprocessor for space applications which can be used in command and control systems and other critical functions in outer space. The SHAKTI ...

IIT Madras and ISRO have collaboratively developed the SHAKTI microprocessor for space applications. This indigenous chip, based on RISC-V architecture and backed by the Ministry of Electronics, aims ...