The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The NOEL-V is designed for space applications: with its high-performance and fault-tolerant design, ...
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V ... instructions, “V” vector extension instructions and “N” for user-level interrupts. It brings ...
HANGZHOU, China, Jan. 9, 2025 /PRNewswire/ -- Recently, SpacemiT, a RISC-V ... bus system to enable distributed peripheral virtualization and accelerator acceleration. Including CPU subsystem ...
RISC-V CPU core X100 ... locations within the SoC bus system to enable distributed peripheral virtualization and accelerator acceleration. Including CPU subsystem, bus subsystem, IOMMU subsystem ...
HANGZHOU, China, Jan. 8, 2025 /PRNewswire/ -- Recently, SpacemiT, a RISC-V AI CPU company ... locations within the SoC bus system to enable distributed peripheral virtualization and accelerator ...
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